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Auteur Colin O'Flynn |
Documents disponibles écrits par cet auteur (31)
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Colin O'Flynn, Auteur | 2017"Colin turns his attention to an asymmetric algorithm : an RSA implementation. Along the way he describes what's unique about an RSA cryptosystem and takes us through a power analysis attack." (Extrait de Circuit Cellar n°328)Article : texte imprimé
Colin O'Flynn, Auteur | 2017"This article continues the foray into breaking software seurity routines, now targeting a software implementation of DES. This builds on a previous example of breaking a hardware AES example." (Extrait de Circuit Cellar n°325)Article : texte imprimé
Colin O'Flynn, Auteur | 2017"In his previous column, Colin showed how timing attacks could be used to break a password check. This article brings out a more advanced type of attack called a power analysis attack, which exploits small leaks about internal states of a microcontroller to recover the password." (Extrait de ...Article : texte imprimé
Colin O'Flynn, Auteur | 2017"Even if you aren't dealing with sensitive data, you probably want to ensure people can't easily clone your device. Embedded security is something every electrical engineer should care about. This article introduces simple timing and power analysis attacks to speed up a PIN-code guess." (Extrait de Circuit cellar ...Article : texte imprimé
Colin O'Flynn, Auteur | 2016"This article is a prequel to Colin's December 2015 article, "Building an FPGA board." Rather than showing you how to assemble a complex FPGA board, he provides some details and hints about how to design such a board. He covers how to design a complex board using the ...Article : texte imprimé
Colin O'Flynn, Auteur | 2016"This month's article takes you through a method of attacking implementations of cryptographic algorithms. It exploits leakage resulting from fundamental properties of digital devices, and can be used to attack even highly secure algorithms lie AES. This is demonstrated on an FPGA target device." (Extrait de Circuit cellar ...Article : texte imprimé
Colin O'Flynn, Auteur | 2016"This article is a case study of why you should pay attention to the underlying architecture your HDL code is running on. The use of the simple clock buffer is explored in the Spartan 6 FPGA, and a demonstration of where you might run into placement errors and how you ...Article : texte imprimé
Colin O'Flynn, Auteur | 2016"Recently, the free version of Xilinx Vivado was expanded to include the High Level Synthesis (HLS) feature. This article revisits the tool to explore the creation of an AES-128 hardware encryption block using C++. Colin uses it within the Vivado IP Block design workflow." (Extrait de Circuit cellar ...Article : texte imprimé
Colin O'Flynn, Auteur | 2015"Whether you need a specific interface not available on a dev board or you are now moving into making a real product, you will likely need to lay out a custom FPGA at some point. This will almost certainly mean soldering a BGA device, and this article discusses how to ...Article : texte imprimé
Colin O'Flynn, Auteur | 2015"The USB 3.0 SuperSpeed Standard (and the recently released USB 3.1 SuperSpeed+) brings the ability to stream data at breakneck speeds. Such speeds are probably of little use for standard microcontroller projects, but FPGAs can easily make use of this bandwidth for everything from software-defined radios to logic analyzers. This article will ...