Titre :
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Low-power FPGA logic design : has it been in front of us all this time ? (2015)
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Auteurs :
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Yitzhak Ovadya, Auteur ;
Shimon Mizrahi, Auteur ;
Josh Lorch, Auteur ;
Elnatan Hatzroni, Auteur
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Type de document :
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Article : texte imprimé
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Dans :
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Circuit cellar (305, December 2015)
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Article en page(s) :
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P. 26-31
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Langues:
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Américain
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Sujets :
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IESN
Circuit logique
;
Consommation énergétique
;
Electronique
;
Performance
;
Signal (électronique)
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Résumé :
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"Logic design engineers are often required to apply numerous simple modifications to their designs, such as clock gating and enable signals. Such modifications are primarily intended to improve the logical performance of the design. On the other hand, they must also keep an eye on their circuit's power consumption. What effect do these simple logical performance enhancement methods have on power consumption." (Extrait de Circuit cellar n°305)
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